This position is charted to deliver advanced Core IP and Client SOCs using latest technological and process innovations. The Core/CPU IP developed by the team goes into Intel's latest Client and Server SOCs.

Responsibilities of the role include, although not limited to:

• Oversee definition, design, verification, and documentation for x86 Core (CPU) IP.

• Design, development and delivery of RTL for a high performance, power/area efficient X86 Core (CPU) IP.

• Analyze multiple uArch and implementation options to find the optimal design point considering power/performance/area/cost trade-offs.

• Determine architecture design, logic design, and system simulation.

• Developing a functional block/unit RTL model, then integrating and validating, planning and directing physical implementation and block integration.

• Define module interfaces/formats for simulation.

• Root cause regression/test failures, propose and implement logic bug fixes.

• Skills at using sound methods and data to test new ideas as well as the desire to have your own ideas be challenged by others.

• Skills to develop an implementation plan, monitor key indicators, and adjust resources and scope to deliver value on schedule.

• Solid communication and collaboration skills.

• Working with Global teams.

• Tolerance to ambiguity.

Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:
The candidate must have a Bachelor's degree in Electrical/Computer Engineering or Computer Science and 3+ years of experience in:
OR
Master's degree in Electrical/Computer Engineering or Computer Science and 5+ years of experience in:

• System Verilog/Verilog/VHDL and/or VCS or similar Simulator.

• Logic design and/or front end.

• Computer architecture and microarchitecture.

• Software/programming languages (i.e. C, C++, C#, Visual Basic/.NET. Perl, Python, Java, etc.).

• Modern energy-efficient/low-power logic design techniques, including those specifically applicable to high frequency optimization.

Preferred Qualifications:

• Knowledge of Intel Architecture ISA and system architecture, including x86 assembly language.

• Experience with high speed circuit design and optimization for data path, circuits and/or arrays.

• Familiarity with circuit planning and timing convergence.

• Experience working with cross functional teams (Architecture, Spec development, Design, Formal, Verification).

Inside this Business Group
The Core and Client Development Group (C2DG) is a worldwide organization focused on the development and integration of SOCs, Core ™, and critical IPs that power Intel's leadership products, driving most of the Client roadmap for CCG, Delivering Server First Cores that enable continued growth for DCG and invest in future disruptive technologies.

Covid Statement
Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html

Working Model
This role will require an on-site presence.